When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48…

Description

When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data leakage.

Scores

EPSS (exploitation in 30 days)

2.4% · top 16% of all CVEs (6 Nov 2026)

The list uses the assigner's score when there is one, then CISA's, then NVD's: High 7.5.

Weakness

• TBD
• CWE-74 (opens in a new tab)All about CWE-74 and its CVEs

Affected products

• AMD · All supported processors

  • affected unspecified – < undefined

References (2)

• https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1010 (opens in a new tab)x_transferred
• [oss-security] 20231205 SLAM: Spectre based on Linear Address Masking (opens in a new tab)mailing-listx_transferred

Sources

The same CVE in the primary databases and aggregators, to check against.

• CVE.org record (opens in a new tab)
• CVE List JSON (GitHub) (opens in a new tab)
• NVD (opens in a new tab)
• FIRST EPSS (opens in a new tab)
• OSV.dev (opens in a new tab)
• GitHub Advisories (opens in a new tab)
• CIRCL Vulnerability-Lookup (opens in a new tab)

Badge for a README or a ticket

[![CVE-2020-12965](https://trackcve.app/badge/CVE-2020-12965.svg)](https://trackcve.app/cve/CVE-2020-12965)

Record last updated 16 Sept 2024, 22:40 UTC.