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CVE-2021-1104
The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead…
Critical9.8EPSS 1.7%
- Published
- Updated
- Reserved
- Assigned by
- nvidia
Description
The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.
Scores
| Scored by | CVSS | Score | Vector |
|---|---|---|---|
| NVDNVD · Modified | 3.1 | Critical9.8 | CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H |
- EPSS (exploitation in 30 days)
- 1.7% · top 23% of all CVEs (6 Nov 2026)
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The list uses the assigner's score when there is one, then CISA's, then NVD's: Critical 9.8.
Weakness
- information disclosure, data tampering and denial of service
- CWE-908 (opens in a new tab)All about CWE-908 and its CVEs
Affected products
RISCV.org · Machine Trap Base Address (MTVEC) Register
- affected All versions
References (1)
Sources
The same CVE in the primary databases and aggregators, to check against.
- CVE.org record (opens in a new tab)
- CVE List JSON (GitHub) (opens in a new tab)
- NVD (opens in a new tab)
- FIRST EPSS (opens in a new tab)
- OSV.dev (opens in a new tab)
- GitHub Advisories (opens in a new tab)
- CIRCL Vulnerability-Lookup (opens in a new tab)
Badge for a README or a ticket
[](https://trackcve.app/cve/CVE-2021-1104)Record last updated .