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CVE-2022-27672

When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT…

Medium4.7EPSS 0.28%
Published
Updated
Reserved
Assigned by
AMD

Description

When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT mode switch potentially resulting in information disclosure.

Timeline

  1. ID reserved

    By AMD

  2. · 11 months later

    Published

  3. · 3 years later

    Record updated

Changes after publication (a new score, a public exploit, EPSS crossing 1, 10 or 50 %, leaving KEV) are kept since November 2026; earlier ones are not known.

Scores

CVSS scores of CVE-2022-27672, by who scored it
Scored byCVSSScoreVector
NVDNVD · Modified3.1Medium4.7CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:N
EPSS (exploitation in 30 days)
0.28% · top 79% of all CVEs (7 Nov 2026)
Loading the EPSS history…

The list uses the assigner's score when there is one, then CISA's, then NVD's: Medium 4.7.

Weakness

  • n/a

Affected products

References (3)

Sources

The same CVE in the primary databases and aggregators, to check against.

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Record last updated .